JTAG-HS2

../../_images/digilent-hs2.jpg

The JTAG-HS2 programming cable is a high-speed programming solution for Xilinx® FPGAs. Official reference can be found here.

Configuration

You can configure debugging tool using debug_tool option in “platformio.ini” (Project Configuration File):

[env:myenv]
platform = ...
board = ...
debug_tool = digilent-hs2

If you would like to use this tool for firmware uploading, please change upload protocol:

[env:myenv]
platform = ...
board = ...
debug_tool = digilent-hs1
upload_protocol = digilent-hs1

More options:

Platforms

Name

Description

OpenHW Group

OpenHW Group is a not-for-profit, global organization that provides an infrastructure for hosting high quality open-source HW developments in line with industry best practices. The OpenHW CV32E40P RISC-V core is the first open-source core for high-volume chips verified with the state-of-the-art process required for high-integrity, commercial SoCs.

Frameworks

Name

Description

PULP Runtime Environment

Runtime Environment for Parallel Ultra Low Power platform

PULP SDK

Software Development Kit for Parallel Ultra Low Power platform

Boards

Note

For more detailed board information please scroll tables below by horizontal.

Name

Platform

Debug

MCU

Frequency

Flash

RAM

Digilent Nexys A7

OpenHW Group

On-board

320MHz

16MB

1.16MB