Verilator

Verilator is a free and open-source software tool which converts Verilog to a cycle-accurate behavioral model in C++ or SystemC. Official reference can be found here.

Configuration

You can configure debugging tool using debug_tool option in “platformio.ini” (Project Configuration File):

[env:myenv]
platform = ...
board = ...
debug_tool = verilator

More options:

• Debugging options

Platforms

Name	Description
CHIPS Alliance	The CHIPS Alliance develops high-quality, open source hardware designs relevant to silicon devices and FPGAs.

Frameworks

Name	Description
FreeRTOS	FreeRTOS is a real-time operating system kernel for embedded devices that has been ported to 40 microcontroller platforms
WD-Firmware	The WD Firmware package contains firmware applications and Processor Support Package (PSP) for various cores, alongside demos which support all features
Zephyr RTOS	The Zephyr Project is a scalable real-time operating system (RTOS) supporting multiple hardware architectures, optimized for resource constrained devices, and built with safety and security in mind

Boards

Note

For more detailed board information please scroll tables below by horizontal.

Name	Platform	Debug	MCU	Frequency	Flash	RAM
RVfpga: Digilent Nexys A7	CHIPS Alliance	On-board		320MHz	16MB	1.16MB