Freedom E SDK

Configuration:framework = freedom-e-sdk

Open Source Software for Developing on the SiFive Freedom E Platform

For more detailed information please visit vendor site.

Configuration

Using with FreeRTOS

In order to add FreeRTOS to your project, it must be explicitly specified as an additional framework in the framework field of “platformio.ini” (Project Configuration File), for example:

[env:freertos]
platform = sifive
framework = freedom-e-sdk, freertos
board = ...

Note

FreeRTOS RISC-V port for the SiFive development platform is distributed as part of Freedom E SDK and cannot be used as a standalone framework

Most of the application specific configuration is done in a special file called FreeRTOSConfig.h which must be present in each FreeRTOS-based project. Additional settings for build configuration are set in “platformio.ini” (Project Configuration File) using the following syntax board_build.freertos.* where * is an option from the following list:

FreeRTOS settings

heap_model:

Available values: heap_1, heap_2, heap_3, heap_4, heap_5 | Default: heap_4

FreeRTOS offers several heap management schemes that range in complexity and features:

  • heap_1 – the very simplest, does not permit memory to be freed.
  • heap_2 – permits memory to be freed, but does not coalescence adjacent free blocks.
  • heap_3 – simply wraps the standard malloc() and free() for thread safety.
  • heap_4 – coalescences adjacent free blocks to avoid fragmentation. Includes absolute address placement option.
  • heap_5 – as per heap_4, with the ability to span the heap across multiple non-adjacent memory areas.

More information about FreeRTOS Memory Management can be found in the official documentation.

interrupt_handler:
 

Default: FreedomMetal_InterruptHandler

The name of a function to be called to handle interrupts

exception_handler:
 

Default: FreedomMetal_ExceptionHandler

The name of a function to be called to handle exceptions

mtime_ctrl_addr:
 

Default: 0x2000000

The address of Machine Timer Register mtime

mpu_wrappers:

Available values: enable | disable | Default: disable

Use Memory Protection Unit wrappers

Segger SystemView settings

SystemView is a real-time recording and visualization tool for embedded systems that reveals the true runtime behavior of an application.

systemview:

Available values: enable | disable | Default: disable

Compile and link Segger SystemView library

sysview_record_enter_isr:
 

Default: SEGGER_SYSVIEW_RecordEnterISR

The name of a function to be called to record interrupt execution.

sysview_record_enter_isr:
 

Default: SEGGER_SYSVIEW_RecordExitISR

The name of a function to be called to record finish of interrupt execution.

sysview_record_exit_isr_to_scheduler:
 

Default: SEGGER_SYSVIEW_RecordExitISRToScheduler

The name of a function to be called to record finish of interrupt when it’s caused by a context switch.

An example of “platformio.ini” (Project Configuration File) with modified heap settings and enabled SystemView feature:

[env:sifive-hifive1-revb]
platform = sifive
framework = freedom-e-sdk, freertos
board = hifive1-revb
monitor_speed = 115200
; Configure stack size
board_build.freedom-e-sdk.heap_size = 0x400
; Configure heap model and enable SystemView
board_build.freertos.heap_model = heap_1
board_build.freertos.systemview = enable

More information about FreeRTOS package for SiFive development platform can be found in the official repository.

Debugging

PIO Unified Debugger - “1-click” solution for debugging with a zero configuration.

Tools & Debug Probes

Supported debugging tools are listed in “Debug” column. For more detailed information, please scroll table by horizontal. You can switch between debugging Tools & Debug Probes using debug_tool option in “platformio.ini” (Project Configuration File).

Warning

You will need to install debug tool drivers depending on your system. Please click on compatible debug tool below for the further instructions.

On-Board Debug Tools

Boards listed below have on-board debug probe and ARE READY for debugging! You do not need to use/buy external debug probe.

Name Platform MCU Frequency Flash RAM
Arty FPGA Dev Kit SiFive FE310 450MHz 16MB 256MB
HiFive Unleashed SiFive FU540 1500MHz 32MB 8GB
HiFive1 SiFive FE310 320MHz 16MB 16KB
HiFive1 Rev B SiFive FE310 320MHz 16MB 16KB
SparkFun RED-V RedBoard SiFive FE310 320MHz 16MB 16KB
SparkFun RED-V Thing Plus SiFive FE310 320MHz 16MB 16KB

Platforms

Name Description
SiFive SiFive brings the power of open source and software automation to the semiconductor industry, making it possible to develop new hardware faster and more affordably than ever before.

Boards

Note

SiFive

Name Platform Debug MCU Frequency Flash RAM
HiFive Unleashed SiFive On-board FU540 1500MHz 32MB 8GB
HiFive1 SiFive On-board FE310 320MHz 16MB 16KB
HiFive1 Rev B SiFive On-board FE310 320MHz 16MB 16KB

SparkFun

Name Platform Debug MCU Frequency Flash RAM
SparkFun RED-V RedBoard SiFive On-board FE310 320MHz 16MB 16KB
SparkFun RED-V Thing Plus SiFive On-board FE310 320MHz 16MB 16KB

Xilinx

Name Platform Debug MCU Frequency Flash RAM
Arty FPGA Dev Kit SiFive On-board FE310 450MHz 16MB 256MB