RISC-V is an open, free ISA enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
For more detailed information please visit vendor site.
Examples are listed from RISC-V development platform repository:
PIO Unified Debugger - “1-click” solution for debugging with a zero configuration.
Supported debugging tools are listed in “Debug” column. For more detailed information, please scroll table by horizontal. You can switch between debugging Tools & Debug Probes using debug_tool option in “platformio.ini” (Project Configuration File).
You will need to install debug tool drivers depending on your system. Please click on compatible debug tool below for the further instructions.
Boards listed below have on-board debug probe and ARE READY for debugging! You do not need to use/buy external debug probe.
Boards listed below are compatible with PIO Unified Debugger but DEPEND ON external debug probe. They ARE NOT READY for debugging. Please click on board name for the further details.
|E51 Arty (Artix-7) FPGA Dev Kit||E51||1500MHz||16MB||256MB|
|Freedom E310 Arty (Artix-7) FPGA Dev Kit||E31||320MHz||16MB||256MB|
; Latest stable version [env:latest_stable] platform = riscv board = ... ; Custom stable version [env:custom_stable] platform = [email protected] board = ...
[env:upstream_develop] platform = https://github.com/platformio/platform-riscv.git board = ...
|framework-freedom-e-sdk||Open Source Software for Developing on the SiFive Freedom E Platform|
|tool-openocd-riscv||OpenOCD for RISC-V|
|toolchain-riscv||GNU toolchain for RISC-V, including GCC|
|Freedom E SDK||Open Source Software for Developing on the SiFive Freedom E Platform|